This application claims the priority of Korean Patent Application No. 2002-57461, filed on Sep. 19, 2002, in the Korean Intellectual Property Office, the contents of which are incorporated herein in their entirety by reference.
1. Field of the Invention
The present invention relates to a bipolar transistor and a method of manufacturing the same, and more particularly, to a heterojunction bipolar transistor (HBT) having excellent performances and a method of manufacturing the same.
2. Description of the Related Art
Recently, as the communication industry rapidly develops and the operating rate of data communication systems increases, devices such as high speed and high frequency transistors have been developed. Silicon level devices such as bipolar transistors, in which bases are formed by implanting impurities into silicon layers, have been commonly used; however, as demands for high-speed communication networks increase, HBT technology in which bases are formed by crystalline growing silicon germanium (SiGe) has been introduced.
In the structure of a conventional bipolar transistor, a low resistance layer such as a metal silicide layer is formed on a silicon base layer in order to reduce the resistance when flowing current from base electrodes to an emitter electrode. However, in such a structure, when the base layer is formed of a thin silicon layer including germanium to a thickness less than 1,000 Å, it is difficult to form the metal silicide layer having a predetermined thickness. In particular, when an agglomeration of the metal silicide layer occurs, the metal silicide layer may pass through the base layer and electrically contact a collector region. As a result, a schottky junction, instead of a PN junction, occurs between the base electrodes and the collector electrode, so the operation rate is lowered and the bipolar transistor may operate incorrectly. In order to prevent such results, the metal silicide layer has to be formed in a region separated from the collector region. Thus, base parasitic resistance increases, deteriorating the performance of the device, and it is difficult to reduce the size of the device.
In another conventional bipolar transistor, impurities of the same conductivity type as a base layer are ion implanted into regions adjacent to the surface of collector regions so that base implantation regions are formed. However, in such a structure, the base implantation regions having the opposite conductivity type from the impurities implanted into the collector region are formed in the collector regions, so junction capacitance increases. Thus, a large amount of a high frequency signal current, which is supplied from base electrodes, flows to a well forming the collector regions before flowing to an emitter electrode. As a result, the efficiency of the device is lowered. In addition, impurities have to be implanted through the base layer formed of a silicon layer including germanium in order to form the base implantation regions. In this case, defects occur and noise characteristics and leakage current characteristics of the device deteriorate. Therefore, the impurities cannot be heavily implanted into the collector regions to reduce the current resistance between the base electrodes and the emitter electrode, so there are limits in reducing the current resistance between the base electrodes and the emitter electrode. On the other hand, the current resistance between the base electrodes and the emitter electrode can be reduced by reducing the parasitic resistance by reducing the length of a non-intrinsic base region, which is a region that extends from a base ohmic electrode to an intrinsic base region. However, when the length of the non-intrinsic base region in the conventional bipolar transistor including the base implantation regions is reduced, a leakage current is generated at the junction of the collector regions and the emitter region. Accordingly, there are limits in reducing the length of the non-intrinsic base region, so there are limits in reducing the size of the device.